What's JTAG test?
   
 
Joint Test Action Group (JTAG) is the common name for what was later standarized as the IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture:
a. TDI (Test Data In)
b. TDO (Test Data Out)
c. TCK (Test Clock)
d. TMS (Test Mode Select)
e. TRST (Test Reset) optional)
 
  
Application of JTAG for CPLD/FPGA is allowing device programmer hardware to transfer data into internal non-volatile device memory (CPLDs). Some device programmers serve a double purpose for programming as well as debugging the device. In the case of FPGAs, volatile memory devices can also be programmed via the JTAG port normally during development work. In addition, newer parts, for instance Xilinx Virtex-5, have internal monitoring capability accessible via the JTAG port.
  
What testing WE can do?
a. Check the JTAG ID CODE, all CPLD/FPGA have a JTAG ID CODE.
b. Check the Part Number, can read the part number from CPLD/FPGA via JTAG.
c. Functional testing, can check the LUT, CLB, Memory, PLL, IO pins.
 
What Brands' parts can do JTAG test?
 
  • Xilinx
 
  • Altera
 
  • Marvell
 
  
  
  
  
 
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This Week in the Lab...
Inspection Accept
77%
Electrical Testing Pass
75%
This list contains the devices that have had over 5% failure in electrical testing within one week. 
  
Click below link to get the Substandard Devices Details (part number, MFG, Date Codes, Failure Rate and Failure mode).
  
    
   Burr-Brown ADS7844N/1K Failure - no Digital data, and some pieces with bent pins.
    
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Weekly Report Archives
Substandard Parts Lists from 2009-2016
  
Click on the Weekly Quality Report page on our website and then click the "View our Archive" button to see each posting from 2009 thru 2016.
  
  
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We hope you find this report informative and usefull for your organization. 
  
 
 
 
 
All the best,

Mark A. Rinehart
White Horse Laboratories