Design Features of the Alpha 9500 (Part 1)
Gordon Hardman W0RUN

In the process of engineering any new product there are myriad decisions to be made along the way. This article will look at some of the design features and choices made in developing the Alpha 9500.

The Alpha 87A was the predecessor to the 9500. An automatically tuned amplifier designed in the early 1980's, approximately 1,500 were produced. Since it had been so successful, the question might be asked: why a new design? The initial impetus for starting on the 9500 design was two-fold.  First, the technology was dated. What this meant was that, although we could still build and support the 87A, there were now better parts available, improved manufacturing processes and other benefits to updating the design. For instance, moving from a wholly through-hole-technology (THT) to mostly surface-mount-technology (SMT) gave us a much bigger choice of contract manufacturers to stuff parts on the printed circuit boards.

The second reason was that our domestic supplier of 3CX800 tubes increased the price on the tubes dramatically, and with no warning. The choice was to either pass the cost increase along or look for another source of tubes. At about this time, some US tube distributors began to offer versions of the 3CX1500 (8877) that were being manufactured in China. These were attractively priced, and our tests on initial samples indicated they held up well in comparison with domestic 8877's. Unfortunately, there were no alternative 3CX800 tubes available that we judged to have adequate performance and whose availability could be depended upon.

The wiring harness for the 87A was quite intricate, and we were paying a premium to have these made locally. Automotive manufacturers and manufacturers of major pieces of domestic electronics faced this same problem a few years earlier than we did. They came up with solutions that allow the use of ribbon cable and mass-terminated connectors to drastically reduce the cost, size and weight of wiring. Key to this is partitioning the design into functional blocks, and passing the minimum amount of data between these blocks to allow them to function. Looking at an amplifier, it became clear that there were certain blocks that were easy to break out. The idea was to make each block be able to operate "stand-alone" to a great degree.

Assuming each block would now contain a microprocessor, much as in a modern car, the first important choice was the protocol that would allow the various blocks to communicate. After reviewing several options, the Inter-Integrated-Circuit (IIC or I2C) bus was chosen. This bus was developed by the European electronics giant Philips to allow blocks inside major consumer appliances, such as televisions, entertainment centers etc. to communicate with each other. The big concern was how this bus (nominally using 5V signal levels) would fare in close proximity to wires with hundreds or even thousands of volts of RF on them. After all, reliable inter-module communication is key to making this sort of scheme work.

It turned out that a three-pronged attack on the reliability of the I2C bus yielded the desired level of reliability. The first part of this was to use a chip that Philips had designed to extend the range (distance) over which I2C could be used. It is basically a current-amplifier, and can drive a load with a lot of capacitance, such as a very long cable (Philips did a demo over a mile of cable). We did not need the range, but we could make good use of its' ability to drive capacitive loads. We could put good filter capacitors on the I2C bus lines to kill the RF that might spill over from other components in the amplifier, and the range-extender chip would drive the I2C signals into them nicely.

The I2C bus uses a "master-slave" protocol, where a master generates the clock on one wire, and data is sent back and forth over a second wire. Thus the master controls the timing on the bus. The second part of achieving reliable transfer of data was the decision to send all data many times (redundancy), such that if one data transfer received interference, it would be corrected soon thereafter. The eventual rate chosen was 10 milliseconds. So the master sends and receives all necessary data every 10 milliseconds from all the slaves. Thus, everything is updated 100 times per second.  A missed data "packet" to or from a slave will only cause the briefest "stutter" in the amplifier's operation, and will not be noticed.

The third and final part of the I2C design was to protect each packet of data going to or from a slave with a "horizontal parity check" byte. This provides adequate protection against transmission errors and is computationally simple to generate.

The result has been a robust data bus that works reliably in the face of considerable electromagnetic interference.

Next time we will look at the various blocks, and some other aspects of the amplifier's design.

73's
Gordon, W0RUN